FIG. 13 is a circuit diagram showing an example of a conventional differential amplifier. In FIG. 13, reference numeral 1 denotes a signal source in which an AC voltage signal is superimposed on a DC voltage source, and reference numerals 2 and 3 denote transistors constituting an emitter follower type amplifier, respectively. Reference numerals 4 and 5 denote constant current sources for supplying a current to the respective emitters of the transistors 2 and 3. Furthermore, reference numeral 6 denotes a resistor for supplying a current to the respective bases of the transistors 2 and 3, and serves to determine the electric potential of the signal source 1 together with a resistor 7.
According to such a structure, signals converted to have low impedances are obtained from the respective emitters of the transistors 2 and 3. These two signals have an AC voltage signal superimposed on a DC voltage which is obtained by level-shifting a DC voltage part of the signal source 1 by a voltage (Vbe) part between the base and emitter of each of the transistors 2 and 3. The signals obtained from the respective emitters of the transistors 2 and 3 are connected to input terminals 15 and 16 of a differential amplifier 14 through coupling capacitors 8 and 9. Reference numerals 10, 11, 12 and 13 denote resistors for biasing a transistor in the differential amplifier 14, reference numeral 17 denotes a first voltage source, that is, a positive electrode power terminal in this case, and reference numeral 18 denotes a second voltage source, that is, a negative electrode power terminal in this case.
Next, the action and operation of the conventional art will be described.
Although the signal source 1 has been represented by a basic equivalent circuit in which a signal source resistor, an AC voltage signal source and a DC voltage source are connected in series in order to easily understand the description as shown in FIG. 13, a signal is actually taken out by a magnetoresistive head (MRH) or the like in a more complicated equivalent circuit, for example. For this reason, the resistors 6 and 7 are serially connected to the signal source 1 in order to determine the circuit potential of the signal source 1, the other terminal of the resistor 6 is connected to the positive electrode power terminal 17 and the other terminal of the resistor 7 is connected to the negative electrode power terminal 18. The resistor 6 also serves to produce a bias current to be supplied to the respective bases of the transistors 2 and 3.
The collectors of transistors 2 and 3 are connected to the positive electrode power terminal 17 respectively, and emitters are connected to the constant current sources 4 and 5, thereby supplying an emitter current. Thus, two independent emitter follower type amplifiers are formed. The constant current sources 4 and 5 cause currents having almost the same values to flow. Consequently, voltages between the bases and emitters of the transistors 2 and 3 are almost equal to each other. Thus, a signal in which an AC voltage signal is superimposed on a DC voltage can be obtained as a low impedance signal in each of the emitters.
Furthermore, one of the terminals of each of the coupling capacitors 8 and 9 is connected to the emitter of each of the transistors 2 and 3, and the other terminal thereof is connected to each of the input terminals 15 and 16 of the differential amplifier 14 in the subsequent stage. The resistors 10, 11, and 12, 13 for supplying bias voltages are connected to the input terminals 15 and 16 of the differential amplifier 14, respectively. The bias voltages of the input terminals 15 and 16 are set to DC voltages which are almost equal to each other, and act such that the differential amplifier 14 can stably perform an amplifying operation. An output is given as a differential output from the differential amplifier 14 to the terminals 19 and 20.
FIGS. 14A and 14B show examples of the differential amplifier 14. FIG. 14A shows the differential amplifier 14 in FIG. 13, and FIG. 14B shows the structure of the differential amplifier 14 in more detail. In FIG. 14B, reference numerals 21 and 22 denote transistors constituting a differential pair, and have respective emitters connected in common and furthermore connected to a constant current source 23, thereby supplying a bias current. Each of the collectors of the transistors 21 and 22 constituting a differential pair is connected to each of the emitters of the transistors 23 and 24 in order to reduce a time constant of a capacity parasitic to the collector section. The transistors 23 and 24 have bases connected in common and connected to a DC power source 25. A differential current signal obtained on each of the collectors of the transistors 21 and 22 constituting the differential pair passes from each of the emitters of the transistors 23 and 24 through each of the collectors thereof, and is supplied to load resistors 26 and 27 and is then converted into a differential voltage signal. The differential voltage signal is converted to have a low impedance in two emitter follower type amplifiers constituted by transistors 28 and 29 and constant current sources 30 and 31, and a differential output is obtained on each of the output terminals 19 and 20. Reference numeral 32 denotes a positive electrode power terminal, and reference numeral 33 denotes a negative electrode power terminal.
Since the conventional differential amplifier has the above-mentioned structure, AC voltage signals superimposed on two different DC voltages are taken out for the 2-terminal signal source 1 by using the two coupling capacitors 8 and 9, and are superimposed on two independent DC voltages which are newly produced from two sets of resistance dividing circuits 10, 11, and 12, 13 and are almost equal to each other, thereby generating two voltage signals obtained by superposing the AC voltage signals on the DC voltages which are almost equal to each other, and the coupling capacitors 8 and 9 are connected to the two input terminals 15 and 16 of the differential amplifier 14 in the subsequent stage to perform a differential amplification so that two differential outputs are taken out. Therefore, the two coupling capacitors 8 and 9 have been required.
For example, in the case where a signal having a high frequency of 1 MHz or more is to be amplified, two capacitors are built in a semiconductor chip. Since the capacitor is constituted as a semiconductor integrated circuit, the area of 0.57 mm square is required even if it is assumed that the capacitance is 0.001 uF. Therefore, it can easily be understood that an area of 0.81 mm square is required for two capacitors. The area of 0.81 mm square is enormous on the semiconductor chip so that the semiconductor chip becomes very large. Accordingly, the manufacturing cost of the semiconductor integrated circuit is increased. In reality, it is necessary to make a pattern layout for decreasing a loss angle (tan .delta.) of the capacitor. Therefore, a chip area which is much greater than 0.81 mm square is disadvantageously required.